1. Field of the Invention
The present invention pertains to a read circuit for a memory such as an electrically programmable non-volatile memory of the EPROM or EEPROM type, or any other memory comprising memory cells, the reading of which is done by the detection of a current or voltage variation in the bit line.
2. Description of the Prior Art
In EPROM or EEPROM type memories, for example, each data storage element or memory cell comprises a floating gate MOS transistor, which may be chiefly of the FAMOS (floating gate avalanche injection MOS) or SAMOS (stacked gate avalanche injection MOS) type. This type of transistor may have two states. Thus, in the case of an N-channel MOS transistor, in a first state, no charge or a positive charge is trapped at the floating gate. There may be a conduction channel between the source and the drain. The transistor is then conductive and behaves like a closed switch. In a second state, electrons are trapped at the floating gate. They therefore prevent the creation of a conduction channel in the substrate between the source and the drain. In this case, the transistor is off and behaves like an open switch.
To program a floating-gate MOS transistor, voltages higher than the normal operating voltage should be appropriately applied to the control gate and one of the electrodes in such a way that the floating gate can absorb and keep a charge of electrons. This charge of electrons at the floating gate raises the conduction threshold at the control gate of the transistor. Furthermore, to read a memory thus programmed, a voltage lower than the threshold voltage of the programmed floating gate MOS transistors but greater than the minimum voltage of the non-programmed transistors should be applied to the control gate. This read voltage makes it possible to detect whether the transistor is on or off. In general, the floating gate MOS transistor is connected by one of its electrodes to a bit line biased by a generator. Its other electrode is connected to the ground or to a low voltage. The bit line is also connected to a current or voltage sensor. This sensor measures the current put through the line by the generator. Thus, if the memory cell has not been programmed, the floating gate MOS transistor is on and when a read voltage which is higher than the threshold voltage of the non-programmed transistors is applied, the transistor becomes conductive. A variation in the current or a voltage drop is then detected on the sensor. In the second case, when the memory cell has been programmed, the charges are trapped at the floating gate of the transistor. In this case the read voltage applied to the control gate has a direction opposite to the potential barrier created in the conduction channel by the charges stored in the floating gate. However, this read voltage is then not enough to modify the conduction of the channel, and the transistor stays off. Consequently, the sensor at the end of the bit line does not perceive the current variation or voltage variation.
Thus, with an EPROM type memory as described above, the content of a memory cell can be read according to the consumption of the circuit, especially when the memory is read bit by bit.
This is especially inconvenient for memories used to receive confidential information because it then becomes easy to detect the nature of this information during a read operation.